1. Field of the Invention
The present invention relates to switch-mode, half-bridge power circuits using gated devices, and, more particularly, to opposed current, power converter circuits driven by integrated circuit gate drivers with internal floating gate driver sections.
2. Description of the Related Art
Modern half-bridge power circuits are frequently driven by integrated circuit (IC) gate drivers with internal floating gate driver sections driving the more positive voltage high-side of the half-bridge. The high-side and low-side input control signals are supplied common to the most negative portion of the IC. When IC gate drivers are used in high-voltage, hard-switching, half-bridge power converters, a problem can arise at the turn-off of the positive voltage high-side switch of the half-bridge. In this situation, the instantaneous voltage on the source lead of the high-side switch can momentarily go negative relative to the negative substrate of the IC. The principal reason for the voltage spike is that in a hard-switching converter, the free-wheeling diode cannot become fully conductive instantaneously. The free-wheeling diode""s forward voltage can thus become rather large during this time delay compared to what would be expected in the DC case. In the transient case, the diode appears as a very high resistance device and may have 20 volts forward-biased across it. The 20 volt forward bias may last for approximately 10 to 20 nanoseconds until the diode becomes fully injected. The result is that the gate drive voltage goes negative with respect to the negative substrate of the IC with 20 volts plus any additional voltage due to inductance. As a result, the IC may cause a malfunction of the driver logic resulting in failure of the power stage by simultaneous conduction of the power switches or direct destruction of the gate driver IC. At a minimum, noise will be introduced into the system.
Methods have been developed to attempt to correct this problem. One method attempts to reduce the added voltage generated by the intrinsic inductance in the circuit, thereby decreasing the negative voltage spike imposed on the IC at the turn-off of the positive switch. This method has a serious drawback in the field of the present invention. Even if a designer were to compensate for all inductances in the construction of the circuit, the transient forward voltage across the free-wheeling diode would still be present in the circuit. Attempting to compensate for the intrinsic inductance in the circuit fails to provide a successful solution in fast-switching, high-frequency applications since the forward voltage produced by the free-wheeling diode will still cause simultaneous conduction of the power switches or direct destruction of the gate driver IC.
Another problem of conventional designs is that they have a slower high-side gate driver due to the increased number of cascaded stages in the high-side gate driver as compared to the low-side gate driver. Some designs attempt to match the propagation delay between the high-side and low-side outputs by adding delays in the low side path. A typical method of adding such delays is to cascade an even number of inverters. Despite this effort, the result of the increased number of cascaded stages is imprecise timing in the circuit resulting in common-mode currents or shoot-through. The imprecise timing becomes particularly problematic when attempting to maintain timing over both time and temperature variations. Tolerances of the power switches, gate drive resistors, temperature thresholds, imperfections of the IC, and other parameters must be accounted for. When the tolerances are loose, increased distortion occurs in certain applications, for example, pulse-width modulated (PWM) audio amplifiers.
The present invention provides a circuit for minimizing the effects on gate driver ICs of high-voltage, hard-switching such as when driving opposed current power converters and other similar applications. The present invention overcomes the shortcomings of the prior art by utilizing two separate high-side gate drivers to drive an opposed current power converter, as opposed to the conventional, single high-side gate driver together with a low-side gate driver.
The invention, in one form thereof, comprises a switch-mode opposed current power converter with two separate floating high-side gate drivers. The removal of the low-side driver from the circuit permits the negative substrate potential of the IC to be as negative as necessary to protect the IC. The result is maximum isolation between the control signals for desired applications. The isolation between the control signals reduces the harmful effect of noise generated by the transition of one switch on the modulation process of another switch. The isolation benefits gained by the present invention allow for a single IC to incorporate multiple high-side gate drivers. The present invention has various applications including, for example, audio amplifiers and three-phase motors which require an IC with six high-side gate driver stages.
The high-side design construction operates both the high-side and low-side switches with input control logic referenced to a supply with a negative substrate potential which, in operation, becomes negative with respect to the negative common terminal of both power switches. In effect, the negative substrate potential will be as negative as the most negative spike of forward voltage produced by the free-wheeling diode at the turn-off of the positive switch, thereby preventing a malfunction of the driver logic and destruction of the gate driver IC.
The input control logic reference supply voltage can be produced from a variety of sources. A battery could provide the necessary voltage, although this adds complexity and cost to the system. In one exemplary embodiment, the reference supply voltage is acquired by manipulating the forward recovery voltage of the free-wheeling diode to obtain the necessary voltage required to protect the IC. In another embodiment, the input control logic supply voltage is acquired by the use of an AC power supply already present in the circuit. The above-described embodiments provide the necessary voltage to the input control logic without increasing cost or introducing the added complexity associated with an extra power supply.
In one embodiment of the present invention, a signal translation stage may be included to provide a front-end scheme of translating the input signals to the control logic of the gate drivers. The signal translation stage can be used to correct for noise issues associated with the input signals to the control logic of the gate drivers. The compensation of the signal translation stage is equally useful in correcting noise issues whether they originated on the negative supply voltage (xe2x88x92Vcc) or were a product of the derived reference supply voltage (xe2x88x92Vcx) as further derived below. A signal translation stage includes three or more cascaded transistors with the associated bypass capacitors and resistors to more easily dissipate the noise incident on the control logic from the input signals. Also included in the signal translation stage are parasitic transistors which form the appropriate nonlinear capacitance to track voltages in the cascaded chain, and to properly cancel the effects of noises on the xe2x88x92Vcx supply. The transistors utilized in the construction of the signal translation stage include, but are not limited to, those shown in the drawings. One skilled in the art could readily adapt other types of transistors to the present application. An exemplary embodiment of the signal translation stage is a unique type of high-side gate driver IC which translates the signal from ground to the negative potential of the xe2x88x92Vcx supply.
An advantage of the present invention is that it permits a negative voltage spike on the source lead of the high-side power switch without risking the dysfunction of the converter or other damage to the IC.
Another advantage of the present invention is that the symmetric design allows the propagation delays of the IC to be more uniform for both the high-side and low-side power switches.
Still another advantage of the present invention is the minimization of the quiescent output ripple for an interleaved converter.
A still further advantage of the present invention is a more complete isolation of the input from the output of the driver, thereby reducing noise incident on the input.
Yet another advantage of the present invention is the maximization of the drain source voltage on the internal gate driver translating field effect transistors, thereby reducing the propagation delay of the high-side driver.